Field of the Invention
The present invention relates to digital memories, and more. particularly, to digital memories that are reconfigurable to replace selected defective memory elements with non-defective redundant memory elements for increased yield. In the context of the present invention, the term “digital memories” include static Random Access Memories (RAMs), dynamic RAMs, Magnetic RAMs, registers, latches and any other type of memory or memory device.
It is common in the manufacture of large-area integrated circuit devices for defects to occur. This is particularly true for high density circuits, such as digital memories. To increase the yield of such circuits, it is common to include redundant circuit elements that can be used to replace the defective circuit elements. For example, in many memory devices, redundant columns and/or redundant rows are provided. During wafer level testing, the defective memory elements are identified, and the defective columns or rows are replaced with redundant columns or rows for increased yield.
To perform such a replacement, replacement circuitry is typically provided. The replacement circuitry is often programmed using one or more fuses. Thus, depending on the desired replacement, selected fuses are conditioned (e.g., blown), which causes the replacement circuitry to affect the desired replacement. For digital memories, the fuses and replacement circuitry are typically configured so that an individual memory element cannot be replaced. Rather, an entire row or column must be replaced.
Common integrated circuit fuses include laser blown, laser annealed, or electrically blown type fuses. To condition the fuses, direct access to the fuses is often required. For example, to condition a laser blown or laser anneal type fuse, a laser must have access to the fuse. To condition an electrically blown type fuse, a high voltage or current probe must often have access to the fuse. Because access is often required, the fuses must typically be conditioned before the integrated circuit is packaged, as the fuses are no longer accessible after packaging.
For many integrated circuits, significant post-packaging tests and procedures are performed to evaluate the performance and reliability of the packaged part. For example, it is common to perform burn-in, shake and bake, and other tests on the packaged parts before they are shipped to customers. If one or more memory elements fail during the post-packaging tests or procedures, the part is often discarded, as there is typically no effective way to access the fuses to perform further repairs. Likewise, if some of the memory elements fail after installed in a system, the part must typically be removed and replaced. This can be particularly problematic for many high reliability applications such as space applications and banking applications, where the part cannot be easily replaced and/or the system cannot go down because of part failure at unscheduled times.